Latest news with #LPDDR
Yahoo
4 days ago
- Business
- Yahoo
CDNS Unveils LPDDR6/5X Memory IP System for Next-Gen AI & HPC Workload
Cadence Design Systems (CDNS) recently announced the tapeout of the industry's first LPDDR6/5X memory IP system solution, capable of operating at an impressive 14.4Gbps—a 50% speed boost over previous LPDDR generations. The state-of-the-art IP system not only advances the frontiers of AI infrastructure but also caters to high-performance computing (HPC), data centers and mobile applications by enabling faster data movement, lower latency and scalable integration options. The Cadence IP for the JEDEC LPDDR6/5X standard features a sophisticated PHY architecture combined with a high-performance controller, optimized to deliver exceptional power, performance and area (PPA) efficiency. It provides comprehensive support for both LPDDR6 and LPDDR5X DRAM protocols, ensuring maximum design flexibility. This solution seamlessly integrates into conventional monolithic SoCs as well as advanced multi-die systems by leveraging the Cadence chiplet framework. Notably, this framework, built on the success of the previous LPDDR generation, was successfully taped out in 2024, highlighting its viability for heterogeneous chiplet integration. The integrated PHY and controller memory solution features a cutting-edge, high-performance architecture that is both scalable and adaptable, building on Cadence's well-established DDR5 (12.8Gbps), LPDDR5X (10.7Gbps) and GDDR7 (36G) product lines. As the inaugural release in Cadence's new LPDDR6 IP portfolio, this offering provides full support for the LPDDR6 and LPDDR5X standards, including compatibility with LPDDR5X CAMM2, ensuring robust performance and broad applicability. Designed to serve diverse markets including AI, mobile, consumer electronics, enterprise HPC, and cloud data centers, this advanced LPDDR6/5X memory IP solution delivers improved flexibility to meet varying performance, capacity and cost requirements, supporting extended product lifecycles. The LPDDR6/5X PHY can be tailored to different package and system configurations and is offered as a drop-in hardened macro. This enables quick, reliable integration, significantly accelerating time-to-market for end products. The Cadence LPDDR6/5X controller offers a comprehensive suite of standard and advanced features for memory interfaces, including compatibility with the Arm AMBA AXI bus. Delivered as a soft RTL macro, the controller provides designers with maximum flexibility to optimize features, power, area and performance to suit their specific application needs. Cadence extends its solutions beyond silicon by offering a comprehensive LPDDR6 Memory Model. This model enables engineering teams to conduct thorough protocol checks, achieve functional coverage and follow a defined verification plan to ensure JEDEC compliance. This helps reduce the verification burden on system designers and accelerates the time-to-market for next-generation SoCs adopting LPDDR6. Additionally, this LPDDR6/5X memory IP is part of Cadence's extensive memory IP suite, which also offers DDR, GDDR and HBM technologies. When combined with Cadence's leading analog/mixed-signal tools and UCIe-based chiplet frameworks, customers can develop complete systems with optimized performance and faster time-to-market. Cadence's performance is being boosted by solid demand and intense design activity. Long-term trends such as 5G growth, the rapid rise of hyperscale computing and advancements in autonomous driving are driving increased design work throughout the semiconductor industry. In June 2025, it announced a major expansion of its partnership with Samsung Foundry through a new multi-year IP agreement. This collaboration aims to expand Cadence's portfolio of memory and interface IP solutions across Samsung's advanced process technologies, including SF4X, SF5A and SF2P nodes. By combining CDNS' AI-driven design platforms with Samsung's cutting-edge fabrication technologies, the two companies are set to deliver high-performance, low-power solutions tailored for AI data centers, automotive applications such as ADAS and next-generation RF connectivity. However, the company is up against strong competition from other EDA firms such as Synopsys, ANSYS and Siemens AG (after it acquired Mentor Graphics). This rising competitive intensity puts downward pressure on pricing, squeezing margins. To maintain its edge, Cadence has ramped up its R&D investments, especially in verification and digital design tools, which, while necessary, may hinder operating margin growth. CDNS currently has a Zacks Rank #2 (Buy). Shares of the company have soared 21.3% in the past three months compared with the Zacks Computer-Software industry's growth of 29.8%. Image Source: Zacks Investment Research Some other top-ranked stocks from the broader technology space are NETGEAR, Inc. (NTGR), TaskUs, Inc. (TASK) and Cognizant Technology Solutions Corporation (CTSH). NTGR currently sports a Zacks Rank #1 (Strong Buy), and TASK and CTSH carry a Zacks Rank #2. You can see the complete list of today's Zacks #1 Rank stocks here NETGEAR's earnings beat the Zacks Consensus Estimate in each of the trailing four quarters, with the average surprise being 179.12%. In the last reported quarter, NTGR delivered an earnings surprise of 105.71%. Its shares have gained 92.6% in the past year. TaskUs' earnings beat the Zacks Consensus Estimate in two of the trailing four quarters, matched in one and missed in the other, with the average surprise being 6.39%. In the last reported quarter, TASK delivered an earnings surprise of 18.75%. Its shares have risen 7% in the past year. Cognizant's earnings beat the Zacks Consensus Estimate in the trailing four quarters, the average surprise being 6.38%. In the last reported quarter, CTSH delivered an earnings surprise of 3.36%. Its shares have grown 4% in the past year. Want the latest recommendations from Zacks Investment Research? Today, you can download 7 Best Stocks for the Next 30 Days. Click to get this free report Cognizant Technology Solutions Corporation (CTSH) : Free Stock Analysis Report NETGEAR, Inc. (NTGR) : Free Stock Analysis Report Cadence Design Systems, Inc. (CDNS) : Free Stock Analysis Report TaskUs, Inc. (TASK) : Free Stock Analysis Report This article originally published on Zacks Investment Research ( Zacks Investment Research Error in retrieving data Sign in to access your portfolio Error in retrieving data Error in retrieving data Error in retrieving data Error in retrieving data
Business Wire
09-07-2025
- Business
- Business Wire
Cadence Introduces Industry-First LPDDR6/5X 14.4Gbps Memory IP to Power Next-Generation AI Infrastructure
SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence (Nasdaq: CDNS) today announced the tapeout of the industry's first LPDDR6/5X memory IP system solution optimized to operate at 14.4Gbps, up to 50% faster than the previous generation of LPDDR DRAM. The new Cadence ® LPDDR6/5X memory IP system solution is a key enabler for scaling up the AI infrastructure to accommodate the memory bandwidth and capacity demands of next-generation AI LLMs, agentic AI and other compute-heavy workloads for various verticals. Multiple engagements are currently underway with leading AI, high-performance computing (HPC) and data center customers. The evolution of data centers from HPC compute virtualization to AI training and inference at scale has driven a massive buildout of AI infrastructure, and designing for efficient data movement via memory interfaces has never been more crucial. Share The Cadence IP for the JEDEC LPDDR6/5X standard consists of an advanced PHY architecture and a high-performance controller designed to maximize power, performance and area (PPA) while supporting both LPDDR6 and LPDDR5X DRAM protocols for optimal flexibility. The solution supports native integration into traditional monolithic SoCs as well as multi-die system architectures by leveraging the Cadence chiplet framework, enabling heterogeneous chiplet integration. The chiplet framework, including the previous LPDDR generation, was successfully taped out in 2024. 'The evolution of data centers from HPC compute virtualization to AI training and inference at scale has driven a massive buildout of AI infrastructure, and designing for efficient data movement via memory interfaces has never been more crucial. LPDDR6 has emerged as a key enabler of accelerated compute, providing the speed, bandwidth, power profile and capacity needed to efficiently perform AI inference,' said Boyd Phelps, senior vice president and general manager of the Silicon Solutions Group at Cadence. 'With this tapeout, Cadence is continuing our track record of memory IP leadership by offering an industry-first LPDDR6 implementation delivered as an integrated subsystem optimized for customer applications.' The complete PHY and controller memory system boasts a new high-performance, scalable and adaptable architecture based on Cadence's proven and highly successful DDR5 12.8Gbps, LPDDR5X 10.7Gbps and GDDR7-36G product lines. This first offering in Cadence's new LPDDR6 IP product line supports the LPDDR6 and LPDDR5X standards, including LPDDR5X CAMM2. Suitable for the AI, mobile, consumer, enterprise HPC and cloud data center markets, the advanced LPDDR6/5X memory IP system solution allows maximum flexibility for end products with a range of performance, capacity and cost targets—ensuring long production runs. The LPDDR6/5X PHY is customizable for different package and system topologies and available as a drop-in hardened macro. This ensures fast and reliable integration, translating into rapid time to market. The Cadence LPDDR6/5X controller includes a full set of industry-standard and advanced features for memory interfaces, such as support for the Arm ® AMBA ® AXI bus. The memory controller is provided as a soft RTL macro for maximum flexibility in features, power, area and performance. The Cadence LPDDR6 solution includes the LPDDR6 Memory Model, which enables engineers to perform comprehensive verification and ensure that system-on-chip (SoC) designs are compatible with the latest JEDEC interface standard, accelerating their adoption of this new technology with confidence. The LPDDR6 Memory Model includes a complete set of protocol checks, functional coverage and a verification plan. Available now for customer engagements, the new LPDDR6/5X IP is the latest addition to Cadence's comprehensive family of memory IP system solutions, which also includes DDR, GDDR and HBM. Cadence Memory IP is designed with the company's industry-leading analog/mixed-signal design tools. When combined with Cadence's UCIe ™ -based chiplet framework, the new LPDDR6/5X IP and Cadence's other leading memory and interface IP deliver an optimized solution that enables rapid chiplet realization. For more information on the new LPDDR6/5X IP, please visit the LPDDR landing page on About Cadence Cadence is a market leader in AI and digital twins, pioneering the application of computational software to accelerate innovation in the engineering design of silicon to systems. Our design solutions, based on Cadence's Intelligent System Design ™ strategy, are essential for the world's leading semiconductor and systems companies to build their next-generation products from chips to full electromechanical systems that serve a wide range of markets, including hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics. In 2024, Cadence was recognized by the Wall Street Journal as one of the world's top 100 best-managed companies. Cadence solutions offer limitless opportunities—learn more at © 2025 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and the other Cadence marks found at are trademarks or registered trademarks of Cadence Design Systems, Inc. Arm and AMBA are registered trademarks of Arm Limited (or its subsidiaries) in the US and/or elsewhere. UCIe is a trademark of UCIe Consortium. All other trademarks are the property of their respective owners. Category: Featured
Korea Herald
23-05-2025
- Business
- Korea Herald
TWSC Debuts at COMPUTEX 2025: Empowering AI with Full-Stack Storage Solutions
TAIPEI, May 23, 2025 TWSC made its debut at COMPUTEX 2025, one of the world's leading technology exhibitions, under the theme "Transcending Intelligence, Ascending Full-Stack Solutions." The company showcased a full range of storage products and solutions designed to support next-generation AI and computing applications. As AI adoption accelerates, storage technology is becoming more scenario-driven. TWSC provides tailored "One Solution for One Scenario" services based on its full-chain capabilities in chips, algorithms, and application scenarios, accurately addressing the diverse needs of smart terminals, industrial control, servers, and other fields. Full-Stack Storage Matrix Unleashes Efficiency TWSC highlighted high-throughput, low-latency solutions at the event, including PCIe 5.0 SSDs, DDR5, eMMC, UFS, and LPDDR series. Combining performance and efficiency, these products enable AI inference and edge computing applications. According to TWSC's 2024 annual report, the company reported revenue of RMB 4.773 billion, a 168.74% increase year-over-year. Embedded storage sales reached RMB 843 million, rising by 1730.6%, while high-speed PCIe SSD sales grew 979%, becoming a major growth driver. The company now offers scenario-based solutions across enterprise, embedded, consumer, and industrial applications, building a strong foundation for global growth through advanced storage modules. Full-Stack Self-Developed Capabilities Build Competitive Edge To enhance control over the industrial chain, TWSC has developed an integrated "wafer-to-product" scenario-based service capability, enabling differentiation through media analysis, chip design, firmware optimization, and packaging control. TWSC uses its "5+1+N" global supply chain network to ensure smooth coordination across R&D, production, and delivery. With a robust validation system and adaptive quality control, the company aligns product quality closely with customer needs. From chips to scenarios, and data to value — TWSC's participation highlights the shift of storage technology from basic functions to intelligent services. By integrating industrial resources and expanding application scenarios, the company is building an open and collaborative innovation ecosystem for smart storage. About TWSC: Shenzhen Techwinsemi Technology Co., Ltd. (Stock Code: was established in 2008 and specializes in integrated circuit solutions for storage controllers and modules. The product line covers four major series: SSD, embedded storage, DDR, and portable storage — offering reliable storage solutions for high-value applications such as smart terminals, data centers.
Yahoo
23-05-2025
- Business
- Yahoo
TWSC Debuts at COMPUTEX 2025: Empowering AI with Full-Stack Storage Solutions
TAIPEI, May 23, 2025 /PRNewswire/ -- From May 20 to 23, 2025, TWSC made its debut at COMPUTEX 2025, one of the world's leading technology exhibitions, under the theme "Transcending Intelligence, Ascending Full-Stack Solutions." The company showcased a full range of storage products and solutions designed to support next-generation AI and computing applications. As AI adoption accelerates, storage technology is becoming more scenario-driven. TWSC provides tailored "One Solution for One Scenario" services based on its full-chain capabilities in chips, algorithms, and application scenarios, accurately addressing the diverse needs of smart terminals, industrial control, servers, and other fields. Full-Stack Storage Matrix Unleashes Efficiency TWSC highlighted high-throughput, low-latency solutions at the event, including PCIe 5.0 SSDs, DDR5, eMMC, UFS, and LPDDR series. Combining performance and efficiency, these products enable AI inference and edge computing applications. According to TWSC's 2024 annual report, the company reported revenue of RMB 4.773 billion, a 168.74% increase year-over-year. Embedded storage sales reached RMB 843 million, rising by 1730.6%, while high-speed PCIe SSD sales grew 979%, becoming a major growth driver. The company now offers scenario-based solutions across enterprise, embedded, consumer, and industrial applications, building a strong foundation for global growth through advanced storage modules. Full-Stack Self-Developed Capabilities Build Competitive Edge To enhance control over the industrial chain, TWSC has developed an integrated "wafer-to-product" scenario-based service capability, enabling differentiation through media analysis, chip design, firmware optimization, and packaging control. TWSC uses its "5+1+N" global supply chain network to ensure smooth coordination across R&D, production, and delivery. With a robust validation system and adaptive quality control, the company aligns product quality closely with customer needs. From chips to scenarios, and data to value — TWSC's participation highlights the shift of storage technology from basic functions to intelligent services. By integrating industrial resources and expanding application scenarios, the company is building an open and collaborative innovation ecosystem for smart storage. About TWSC: Shenzhen Techwinsemi Technology Co., Ltd. (Stock Code: was established in 2008 and specializes in integrated circuit solutions for storage controllers and modules. The product line covers four major series: SSD, embedded storage, DDR, and portable storage — offering reliable storage solutions for high-value applications such as smart terminals, data centers. For more information please visit and follow TWSC on Facebook and Linkedin. View original content to download multimedia: SOURCE TWSC Error in retrieving data Sign in to access your portfolio Error in retrieving data Error in retrieving data Error in retrieving data Error in retrieving data
Yahoo
22-05-2025
- Business
- Yahoo
Powering AI with Chiplet Innovation: MSquare's ML100 IO Die Live at COMPUTEX 2025
TAIPEI, May 22, 2025 /PRNewswire/ -- COMPUTEX 2025, Asia's largest and most influential technology event, is currently underway at the Taipei Nangang Exhibition Center, attracting over 50,000 professionals from 34 countries. Making its debut at the show, MSquare Technology is showcasing the ML100 IO Die—the Chiplet solution designed for AI SoC architectures—demonstrating cutting-edge advancements in Chiplet integration and high-speed interconnect solutions. With the theme "AI Next," the event highlights AI & Robotics, Next-Gen Tech, and Future Mobility. As AI models scale exponentially, traditional SoC integration is hitting bandwidth, power, and cost bottlenecks. In response, MSquare introduces a more flexible and energy-efficient Chiplet-based interconnect solution—the ML100 IO Die. The ML100 IO Die is an interconnect Chiplet designed for data centers and high-performance computing, integrating advanced UCIe protocol and HBM3 memory interface technology. By decoupling Soc and HBM through Chiplet partitioning, ML100 optimizes die area, cost, and power consumption while significantly increasing memory bandwidth. It supports 32Gbps UCIe PHY with a peak bandwidth of 1TB/s, significantly outperforming traditional monolithic SoC packaging solutions. It is ideally suited for AI accelerators, inference engines, and high-performance computing chips. In recognition of its innovation, ML100 received the "Best IP of the Year" award from EE Awards Asia 2024. Founded in 2021, MSquare Technology is led by a global team of semiconductor veterans from AMD, Apple, and MediaTek. The company develops high-speed interface IP and Chiplet solutions across diverse protocols—including UCIe, HBM, ONFI, LPDDR, PCIe, and USB—covering process nodes from 5nm to 180nm. Its technologies are deployed across AI, data center, HPC, and advanced consumer applications. MSquare has offices in APAC, US and Australia, forming a global support network to drive faster customer engagement and international deployment. "Chiplet interconnects are the foundation of scalable AI computing," said Rui Tang, Co-founder of MSquare Technology. "By participating in COMPUTEX, we aim to deepen collaboration with ecosystem partners and drive the adoption of next-gen SoC architectures optimized for bandwidth, power, and flexibility." Visit MSquare Technology at COMPUTEX 2025 – Booth N1231, Hall 1, Taipei Nangang Exhibition Center. View original content to download multimedia: SOURCE MSquare Technology Error in retrieving data Sign in to access your portfolio Error in retrieving data Error in retrieving data Error in retrieving data Error in retrieving data
