TSMC Is Targeting 2028 for Its A14 1.4nm Process
The first of these will be A16 and A14, the latter of which TSMC just highlighted at the North America Technology Symposium. That's the upcoming 1.4nm process, which is not to be confused with Apple's A14 Bionic SoC. (Apple's chip appears in some older iPhones and is not made with a sub-nm process.)
Perhaps worse is that Intel also uses the A naming structure—and for the same reason TSMC adopted it. The A in Intel's highly anticipated new A18, 1.8nm-class process stands for Angstrom, a unit of measurement suited to the ever-shrinking die processes.
TSMC says that the A14 process will be a vast improvement compared with the N2 process. A14 offers as much as 15% faster speed than N2. And to top it off, A14 uses significantly less power, up to 30% less, than N2. TSMC plans to make chips for automotive, IoT, and smartphone uses, and will support N4C RF in N2 chips. And, of course, TSMC expects N2 to be picked up in large quantities for AI use. The company will have 9.5 reticle size Chip on Wafer on Substrate (CoWoS) tech, supporting 12+ HBM stacks, by 2027.
TSMC Fab 21. Credit: TSMC
'TSMC's cutting-edge logic technologies like A14 are part of a comprehensive suite of solutions that connect the physical and digital worlds to unleash our customers' innovation for advancing the AI future,' TSMC CEO Dr. C.C. Wei said in a statement.
Don't expect to see A14 chips for a few years, though, with N2 hitting its stride and A16s on target for mass production in 2026. Chips based on the A16 process (not to be confused with Apple's 4nm A16 SoCs, also likely made in Arizona) will most likely reach the data center market in early 2027. The A16 process will be TSMC's first to include backside power delivery, also known as Super Power Rail, which allows for better performance and energy efficiency.
It seems likely that TSMC will make at least some of its A14 wafers in the US, given that it already plans to make Fab 21 (its Arizona campus) sub-2nm capable in the coming years.
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